Abstract
In this paper, a high efficiency dc-dc buck converter with two-step digital pulse width modulation (DPWM) and low power self-tracking zero current detector (ST-ZCD) is proposed for Internet of Things (IoT) and ultralow power applications. The hybrid DPWM core with high linearity and low power consumption is proposed to implement the high efficiency DPWM dc-dc converter. It is composed of a two-step delay control using the counter and delay line. An adaptive window analog to digital converter is proposed to reduce the output voltage ripple within 20 mV. A dead time generator is implemented with the proposed ST-ZCD to minimize the reverse current. The ST-ZCD can improve efficiency by reducing the control loss that accounts for a large proportion of the dc-dc converter. Also, all digital type-III compensator is implemented for the low power and small die area. This chip is fabricated with a 55 nm CMOS process, which uses the standard supply voltage of 1.5-3 V to generate the output voltage of 1.2 V. The total active area is 500 μm × 300 μm. The measured peak efficiency of the DPWM dc-dc buck converter is 91.5% with a quiescent current consuming only 130 μA.
| Original language | English |
|---|---|
| Article number | 7888573 |
| Pages (from-to) | 1428-1439 |
| Number of pages | 12 |
| Journal | IEEE Transactions on Power Electronics |
| Volume | 33 |
| Issue number | 2 |
| DOIs | |
| State | Published - Feb 2018 |
Keywords
- Adaptive window analog to digital converter (ADC)
- DC-DC buck converter
- digital compensator
- digital pulse width modulation (DPWM)
- hybrid digital pulse width modulation core
- self-tracking zero current detector (ST-ZCD)