Design of 66.5dB IRR Baseband Analog with Filter Tuning

Ji Hoon Song; Kang Yoon Lee

doi:10.1109/ISOCC53507.2021.9613855

Design of 66.5dB IRR Baseband Analog with Filter Tuning

Ji Hoon Song
, Kang Yoon Lee

SKAIChips

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper introduces a design of baseband analog with high performance IRR (Image Rejection Ratio) to using wide-bandwidth for DSRC (Dedicated Short Range Communication) transceiver. In addition, an automatic filter tuning system has applied to in this circuit for higher PVT tolerance and accuracy of bandwidth. To reduce adjacent interferers and image signal in baseband circuit, Complex Band Pass Filter (BPF) is used in this system. Baseband analog has high performance of IRR 66.5 dB at 3-dB bandwidth and the Intermediate Frequency (IF) are 10MHz. This circuit is designed in 130nm CMOS process. Power consumption is 7.46mW under 1.2V power supply.

Original language	English
Title of host publication	Proceedings - International SoC Design Conference 2021, ISOCC 2021
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	37-38
Number of pages	2
ISBN (Electronic)	9781665401746
DOIs	https://doi.org/10.1109/ISOCC53507.2021.9613855
State	Published - 2021
Externally published	Yes
Event	18th International System-on-Chip Design Conference, ISOCC 2021 - Jeju Island, Korea, Republic of Duration: 6 Oct 2021 → 9 Oct 2021

Publication series

Name	Proceedings - International SoC Design Conference 2021, ISOCC 2021

Conference

Conference	18th International System-on-Chip Design Conference, ISOCC 2021
Country/Territory	Korea, Republic of
City	Jeju Island
Period	6/10/21 → 9/10/21

Keywords

Automatic Filter Tuning System
Complex Band Pass Filter
DSRC(Dedicated Short Range Commu nication)
Image Rejection Ratio
Wideband

Access to Document

10.1109/ISOCC53507.2021.9613855

Cite this

@inproceedings{d2e1b552d95a4a2db3c0ad8082e2aa3d,

title = "Design of 66.5dB IRR Baseband Analog with Filter Tuning",

abstract = "This paper introduces a design of baseband analog with high performance IRR (Image Rejection Ratio) to using wide-bandwidth for DSRC (Dedicated Short Range Communication) transceiver. In addition, an automatic filter tuning system has applied to in this circuit for higher PVT tolerance and accuracy of bandwidth. To reduce adjacent interferers and image signal in baseband circuit, Complex Band Pass Filter (BPF) is used in this system. Baseband analog has high performance of IRR 66.5 dB at 3-dB bandwidth and the Intermediate Frequency (IF) are 10MHz. This circuit is designed in 130nm CMOS process. Power consumption is 7.46mW under 1.2V power supply.",

keywords = "Automatic Filter Tuning System, Complex Band Pass Filter, DSRC(Dedicated Short Range Commu nication), Image Rejection Ratio, Wideband",

author = "Song, \{Ji Hoon\} and Lee, \{Kang Yoon\}",

note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 18th International System-on-Chip Design Conference, ISOCC 2021 ; Conference date: 06-10-2021 Through 09-10-2021",

year = "2021",

doi = "10.1109/ISOCC53507.2021.9613855",

language = "English",

series = "Proceedings - International SoC Design Conference 2021, ISOCC 2021",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "37--38",

booktitle = "Proceedings - International SoC Design Conference 2021, ISOCC 2021",

}

Song, JH & Lee, KY 2021, Design of 66.5dB IRR Baseband Analog with Filter Tuning. in Proceedings - International SoC Design Conference 2021, ISOCC 2021. Proceedings - International SoC Design Conference 2021, ISOCC 2021, Institute of Electrical and Electronics Engineers Inc., pp. 37-38, 18th International System-on-Chip Design Conference, ISOCC 2021, Jeju Island, Korea, Republic of, 6/10/21. https://doi.org/10.1109/ISOCC53507.2021.9613855

Design of 66.5dB IRR Baseband Analog with Filter Tuning. / Song, Ji Hoon; Lee, Kang Yoon.
Proceedings - International SoC Design Conference 2021, ISOCC 2021. Institute of Electrical and Electronics Engineers Inc., 2021. p. 37-38 (Proceedings - International SoC Design Conference 2021, ISOCC 2021).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Design of 66.5dB IRR Baseband Analog with Filter Tuning

AU - Song, Ji Hoon

AU - Lee, Kang Yoon

PY - 2021

Y1 - 2021

N2 - This paper introduces a design of baseband analog with high performance IRR (Image Rejection Ratio) to using wide-bandwidth for DSRC (Dedicated Short Range Communication) transceiver. In addition, an automatic filter tuning system has applied to in this circuit for higher PVT tolerance and accuracy of bandwidth. To reduce adjacent interferers and image signal in baseband circuit, Complex Band Pass Filter (BPF) is used in this system. Baseband analog has high performance of IRR 66.5 dB at 3-dB bandwidth and the Intermediate Frequency (IF) are 10MHz. This circuit is designed in 130nm CMOS process. Power consumption is 7.46mW under 1.2V power supply.

AB - This paper introduces a design of baseband analog with high performance IRR (Image Rejection Ratio) to using wide-bandwidth for DSRC (Dedicated Short Range Communication) transceiver. In addition, an automatic filter tuning system has applied to in this circuit for higher PVT tolerance and accuracy of bandwidth. To reduce adjacent interferers and image signal in baseband circuit, Complex Band Pass Filter (BPF) is used in this system. Baseband analog has high performance of IRR 66.5 dB at 3-dB bandwidth and the Intermediate Frequency (IF) are 10MHz. This circuit is designed in 130nm CMOS process. Power consumption is 7.46mW under 1.2V power supply.

KW - Automatic Filter Tuning System

KW - Complex Band Pass Filter

KW - DSRC(Dedicated Short Range Commu nication)

KW - Image Rejection Ratio

KW - Wideband

UR - https://www.scopus.com/pages/publications/85123373047

U2 - 10.1109/ISOCC53507.2021.9613855

DO - 10.1109/ISOCC53507.2021.9613855

M3 - Conference contribution

AN - SCOPUS:85123373047

T3 - Proceedings - International SoC Design Conference 2021, ISOCC 2021

SP - 37

EP - 38

BT - Proceedings - International SoC Design Conference 2021, ISOCC 2021

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 18th International System-on-Chip Design Conference, ISOCC 2021

Y2 - 6 October 2021 through 9 October 2021

ER -

Design of 66.5dB IRR Baseband Analog with Filter Tuning

Abstract

Publication series

Conference

Keywords

Access to Document

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