Abstract
This paper presents the design method of a low power digitally controlled oscillator (DCO) for Bluetooth Low Energy (BLE) transceivers. Through minimizing parasitic capacitance and maximizing the main inductance, the DCO can mitigate initial oscillation conditions with low supply voltage. The proposed design procedure focuses on how to optimize switched capacitors and their number in capacitor banks within the specifications. A small number of switched capacitors can reduce parasitics and power consumption. The proposed DCO is fabricated using a 55-nm 1P6M CMOS process and meets the specifications of BLE with 0.68-mW power consumption. The phase noise of the DCO is -114.2 dBc/Hz @ 1 MHz at 4.96 GHz. The tuning range of the DCO is set to 4.5-5.3 GHz, which is sufficient to support BLE applications despite the process, voltage, and temperature (PVT) variations.
| Original language | English |
|---|---|
| Pages (from-to) | 611-620 |
| Number of pages | 10 |
| Journal | Journal of Semiconductor Technology and Science |
| Volume | 17 |
| Issue number | 5 |
| DOIs | |
| State | Published - Oct 2017 |
Keywords
- ADPLL
- BLE
- DCO
- IoT
- Low power
- Low voltage
- Subthreshold
- VCO
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