Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications

Jaekwon Kim; Woojin Jang; Yanghoon Lee; Wan Kim; Seunghyun Oh; Jongwoo Lee; Jaehyuk Choi; Jung Hoon Chun; Thomas Byunghak Cho

doi:10.1109/TCSI.2019.2913174

Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications

Jaekwon Kim, Woojin Jang, Yanghoon Lee, Wan Kim, Seunghyun Oh, Jongwoo Lee, Jaehyuk Choi, Jung Hoon Chun, Thomas Byunghak Cho

Department of Semiconductor Systems Engineering

Research output: Contribution to journal › Article › peer-review

15 Scopus citations

Abstract

A 14-nm FinFET CMOS 12-b current-steering digital-to-analog converter (DAC) for 2G/3G/4G cellular applications is presented herein. Bit segmentations of a 6-bit thermometer and 6-bit binary coding are adopted, utilizing switching-order shuffling in combination with dynamic element matching (DEM) to suppress the spurious tones owing to the current-source mismatch in three-dimensional FinFETs. In addition, output switches are designed to achieve make-before-break operation with the proposed low crossing point level shifter. Moreover, an output full-scale current trimming method is applied to maximize the power efficiency of the envelope-tracking (ET). The active area of a single DAC is 0.036 mm², its power consumption is 6.1 mW, and its SFDR is 80 dBc.

Original language	English
Article number	8715807
Pages (from-to)	3723-3732
Number of pages	10
Journal	IEEE Transactions on Circuits and Systems I: Regular Papers
Volume	66
Issue number	10
DOIs	https://doi.org/10.1109/TCSI.2019.2913174
State	Published - Oct 2019

Keywords

barrel-shifter DEM
digital-to-analog converter (DAC)
FinFET
level-shifter
Transmitter

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10.1109/TCSI.2019.2913174

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title = "Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications",

abstract = "A 14-nm FinFET CMOS 12-b current-steering digital-to-analog converter (DAC) for 2G/3G/4G cellular applications is presented herein. Bit segmentations of a 6-bit thermometer and 6-bit binary coding are adopted, utilizing switching-order shuffling in combination with dynamic element matching (DEM) to suppress the spurious tones owing to the current-source mismatch in three-dimensional FinFETs. In addition, output switches are designed to achieve make-before-break operation with the proposed low crossing point level shifter. Moreover, an output full-scale current trimming method is applied to maximize the power efficiency of the envelope-tracking (ET). The active area of a single DAC is 0.036 mm2, its power consumption is 6.1 mW, and its SFDR is 80 dBc.",

keywords = "barrel-shifter DEM, digital-to-analog converter (DAC), FinFET, level-shifter, Transmitter",

author = "Jaekwon Kim and Woojin Jang and Yanghoon Lee and Wan Kim and Seunghyun Oh and Jongwoo Lee and Jaehyuk Choi and Chun, \{Jung Hoon\} and Cho, \{Thomas Byunghak\}",

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year = "2019",

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doi = "10.1109/TCSI.2019.2913174",

language = "English",

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AU - Kim, Jaekwon

AU - Jang, Woojin

AU - Lee, Yanghoon

AU - Kim, Wan

AU - Oh, Seunghyun

AU - Lee, Jongwoo

AU - Choi, Jaehyuk

AU - Chun, Jung Hoon

AU - Cho, Thomas Byunghak

PY - 2019/10

Y1 - 2019/10

N2 - A 14-nm FinFET CMOS 12-b current-steering digital-to-analog converter (DAC) for 2G/3G/4G cellular applications is presented herein. Bit segmentations of a 6-bit thermometer and 6-bit binary coding are adopted, utilizing switching-order shuffling in combination with dynamic element matching (DEM) to suppress the spurious tones owing to the current-source mismatch in three-dimensional FinFETs. In addition, output switches are designed to achieve make-before-break operation with the proposed low crossing point level shifter. Moreover, an output full-scale current trimming method is applied to maximize the power efficiency of the envelope-tracking (ET). The active area of a single DAC is 0.036 mm2, its power consumption is 6.1 mW, and its SFDR is 80 dBc.

AB - A 14-nm FinFET CMOS 12-b current-steering digital-to-analog converter (DAC) for 2G/3G/4G cellular applications is presented herein. Bit segmentations of a 6-bit thermometer and 6-bit binary coding are adopted, utilizing switching-order shuffling in combination with dynamic element matching (DEM) to suppress the spurious tones owing to the current-source mismatch in three-dimensional FinFETs. In addition, output switches are designed to achieve make-before-break operation with the proposed low crossing point level shifter. Moreover, an output full-scale current trimming method is applied to maximize the power efficiency of the envelope-tracking (ET). The active area of a single DAC is 0.036 mm2, its power consumption is 6.1 mW, and its SFDR is 80 dBc.

KW - barrel-shifter DEM

KW - digital-to-analog converter (DAC)

KW - FinFET

KW - level-shifter

KW - Transmitter

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SP - 3723

EP - 3732

JO - IEEE Transactions on Circuits and Systems I: Regular Papers

JF - IEEE Transactions on Circuits and Systems I: Regular Papers

IS - 10

M1 - 8715807

ER -

Design and Analysis of a 12-b Current-Steering DAC in a 14-nm FinFET Technology for 2G/3G/4G Cellular Applications

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Keywords

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