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Degradation Due to Electrical Stress of Poly-Si Thin Film Transistors with Various LDD Lengths

  • Myongji University
  • Seoul National University

Research output: Contribution to journalArticlepeer-review

Abstract

The degradation phenomena of polycrystalline sili-con (poly-Si) thin film transistors (TFT‘s) with various lightly-doped drain (LDD) length have been investigated. It is observed that the threshold voltage shift due to electrical stress varies with LDD length. The threshold voltage shift after 4 hours electrical stress of Vg = V d = 30 V in conventional, 0.5 µm, and 2 µm LDD poly-Si TFT's are about 2.7 V, 5.2 V, and 0.8 V, respectively.

Original languageEnglish
Pages (from-to)245-247
Number of pages3
JournalIEEE Electron Device Letters
Volume16
Issue number6
DOIs
StatePublished - Jun 1995
Externally publishedYes

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