Comparative performance analysis of high density and efficiency PFC topologies

Yun Sung Kim; Won Yong Sung; Byoung Kuk Lee

doi:10.1109/TPEL.2013.2275739

Comparative performance analysis of high density and efficiency PFC topologies

Yun Sung Kim, Won Yong Sung, Byoung Kuk Lee

Department of Electronic and Electrical Engineering

Sungkyunkwan University

Research output: Contribution to journal › Article › peer-review

138 Scopus citations

Abstract

In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back bridgeless boost PFC, and a semi-bridgeless boost PFC, are assessed through loss analysis and simulation using whole height 1 U and 2 kW class prototypes. Based on this, an optimal topology is selected for which an additional comparative analysis involving input line measure improvement control is conducted. The results of these experiments can be adapted for use in the circuit selection of high-performance converters with power factor improvement circuits.

Original language	English
Article number	6578557
Pages (from-to)	2666-2679
Number of pages	14
Journal	IEEE Transactions on Power Electronics
Volume	29
Issue number	6
DOIs	https://doi.org/10.1109/TPEL.2013.2275739
State	Published - Jun 2014

Keywords

Average current mode control
back-to-back bridgeless
boost
interleaved
power factor correction (PFC)
semi-bridgeless

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title = "Comparative performance analysis of high density and efficiency PFC topologies",

abstract = "In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back bridgeless boost PFC, and a semi-bridgeless boost PFC, are assessed through loss analysis and simulation using whole height 1 U and 2 kW class prototypes. Based on this, an optimal topology is selected for which an additional comparative analysis involving input line measure improvement control is conducted. The results of these experiments can be adapted for use in the circuit selection of high-performance converters with power factor improvement circuits.",

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N2 - In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back bridgeless boost PFC, and a semi-bridgeless boost PFC, are assessed through loss analysis and simulation using whole height 1 U and 2 kW class prototypes. Based on this, an optimal topology is selected for which an additional comparative analysis involving input line measure improvement control is conducted. The results of these experiments can be adapted for use in the circuit selection of high-performance converters with power factor improvement circuits.

AB - In this paper, the efficiency and power factor performance of improved power factor correction (PFC) topologies suitable for a high density and efficient design are compared. Several topologies, including a conventional average current mode control boost PFC, an interleaved boost PFC, a back-to-back bridgeless boost PFC, and a semi-bridgeless boost PFC, are assessed through loss analysis and simulation using whole height 1 U and 2 kW class prototypes. Based on this, an optimal topology is selected for which an additional comparative analysis involving input line measure improvement control is conducted. The results of these experiments can be adapted for use in the circuit selection of high-performance converters with power factor improvement circuits.

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Comparative performance analysis of high density and efficiency PFC topologies

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