CMOS passive wake-up circuit for sensor network applications

A passive wake-up circuit with high-voltage sensitivity using standard CMOS technology has been designed and implemented. Voltage multipliers and inverter chain optimized for high-voltage sensitivity have been proposed. A radio identification scheme to make peer-to-peer communication has also been proposed. The wake-up circuit converts small-RF input signals into a DC signal to trigger the interrupt. A duty cycle scheduling is adopted for an advanced power control. Using an RF input signal, whose center frequency is 870 MHz and input power is-29.3 dBm, we achieved an output voltage of 0.7 V, enough to trigger on the output. The fully integrated CMOS IC is fabricated using a 0.18-μm standard CMOS process. The chip area is as small as 230 × 190 μm ².