CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO2/TaN gate stack

J. W. Peng; N. Singh; G. Q. Lo; D. L. Kwong; S. J. Lee

doi:10.1109/IEDM.2009.5424284

CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO₂/TaN gate stack

J. W. Peng, N. Singh, G. Q. Lo, D. L. Kwong, S. J. Lee

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

Ge/Si core/shell gate-all-round nanowire pMOSFET integrated with HfO ₂/TaN gate stack is demonstrated using fully CMOS compatible process. Devices with 100 nm gate length achieved high I_ON of ∼946 μA/μm at V_G - V_T = -0.7 V and V_DS = -1 V and on/off ratio of 10⁴ with decent subthreshold behavior. Significant improvement in hole mobility and ballistic efficiency is demonstrated as a result of core/shell channel architecture.

Original language	English
Title of host publication	2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest
Pages	38.2.1-38.2.4
DOIs	https://doi.org/10.1109/IEDM.2009.5424284
State	Published - 2009
Externally published	Yes
Event	2009 International Electron Devices Meeting, IEDM 2009 - Baltimore, MD, United States Duration: 7 Dec 2009 → 9 Dec 2009

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Conference

Conference	2009 International Electron Devices Meeting, IEDM 2009
Country/Territory	United States
City	Baltimore, MD
Period	7/12/09 → 9/12/09

Access to Document

10.1109/IEDM.2009.5424284

Cite this

Peng, J. W., Singh, N., Lo, G. Q., Kwong, D. L., & Lee, S. J. (2009). CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO₂/TaN gate stack. In 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest (pp. 38.2.1-38.2.4). Article 5424284 (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2009.5424284

@inproceedings{bb7710df45474eeb85f604fec8921e43,

title = "CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO2/TaN gate stack",

abstract = "Ge/Si core/shell gate-all-round nanowire pMOSFET integrated with HfO 2/TaN gate stack is demonstrated using fully CMOS compatible process. Devices with 100 nm gate length achieved high ION of ∼946 μA/μm at VG - VT = -0.7 V and VDS = -1 V and on/off ratio of 104 with decent subthreshold behavior. Significant improvement in hole mobility and ballistic efficiency is demonstrated as a result of core/shell channel architecture.",

author = "Peng, \{J. W.\} and N. Singh and Lo, \{G. Q.\} and Kwong, \{D. L.\} and Lee, \{S. J.\}",

year = "2009",

doi = "10.1109/IEDM.2009.5424284",

language = "English",

isbn = "9781424456406",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

pages = "38.2.1--38.2.4",

booktitle = "2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest",

note = "2009 International Electron Devices Meeting, IEDM 2009 ; Conference date: 07-12-2009 Through 09-12-2009",

}

Peng, JW, Singh, N, Lo, GQ, Kwong, DL & Lee, SJ 2009, CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO₂/TaN gate stack. in 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest., 5424284, Technical Digest - International Electron Devices Meeting, IEDM, pp. 38.2.1-38.2.4, 2009 International Electron Devices Meeting, IEDM 2009, Baltimore, MD, United States, 7/12/09. https://doi.org/10.1109/IEDM.2009.5424284

CMOS compatible Ge/Si core/shell nanowire gate-all-around pMOSFET integrated with HfO₂/TaN gate stack. / Peng, J. W.; Singh, N.; Lo, G. Q. et al.
2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest. 2009. p. 38.2.1-38.2.4 5424284 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Singh, N.

AU - Lo, G. Q.

AU - Kwong, D. L.

AU - Lee, S. J.

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N2 - Ge/Si core/shell gate-all-round nanowire pMOSFET integrated with HfO 2/TaN gate stack is demonstrated using fully CMOS compatible process. Devices with 100 nm gate length achieved high ION of ∼946 μA/μm at VG - VT = -0.7 V and VDS = -1 V and on/off ratio of 104 with decent subthreshold behavior. Significant improvement in hole mobility and ballistic efficiency is demonstrated as a result of core/shell channel architecture.

AB - Ge/Si core/shell gate-all-round nanowire pMOSFET integrated with HfO 2/TaN gate stack is demonstrated using fully CMOS compatible process. Devices with 100 nm gate length achieved high ION of ∼946 μA/μm at VG - VT = -0.7 V and VDS = -1 V and on/off ratio of 104 with decent subthreshold behavior. Significant improvement in hole mobility and ballistic efficiency is demonstrated as a result of core/shell channel architecture.

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DO - 10.1109/IEDM.2009.5424284

M3 - Conference contribution

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T3 - Technical Digest - International Electron Devices Meeting, IEDM

SP - 38.2.1-38.2.4

BT - 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest

T2 - 2009 International Electron Devices Meeting, IEDM 2009

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