Charge storage capabilities of (a/nc) Si embedded in SiO_x matrix and the influence of tunneling layer thickness of SiO₂/(a/nc)Si-SiO_x/SiO_xN_y stack on the memory performances of MIS structure

Silicon with various forms (amorphous or nano crystalline (a/nc)) confined in SiO^x system is a good charge storage candidate for memory applications. The metal-insulator-semiconductor (MIS) structure devices fabricated using SiO₂/(a/nc) Si-SiO_x/SiO_xN_y (OO_xO_n) structure were investigated with SiO_xN_y tunneling thicknesses changing from 2.6 to 3.2 nm and the crystallinity level of Si embedded in SiO_x system varied from 28.07 to 45.81%. The nanocrystals Si confined in SiO_x system act as the "quasi quantum well-like," which restrains the trapped charge within the storage layer. Retention properties were improved with increasing tunneling thickness and the changing in operation voltages was found. By employing the SiO_xNi tunneling layer thicker than 2.6 nm, MIS characteristics showed a retention exceeding 97% of the threshold voltage shift after 104 s, and greater than 73% after 10 yrs. Depending on the tunneling thickness, operating voltages varied from ±10 to ±12 V. These operating properties of the OO_xO_n structure make it be a potential competitor among the new generation of memory structures on glass.