Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores

David Fick; Ronald G. Dreslinski; Bharan Giridhar; Gyouho Kim; Sangwon Seo; Matthew Fojtik; Sudhir Satpathy; Yoonmyung Lee; Daeyeon Kim; Nurrachman Liu; Michael Wieckowski; Gregory Chen; Trevor Mudge; Dennis Sylvester; David Blaauw

doi:10.1109/ISSCC.2012.6176970

Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores

David Fick
, Ronald G. Dreslinski
, Bharan Giridhar
, Gyouho Kim
, Sangwon Seo
, Matthew Fojtik
, Sudhir Satpathy
, Yoonmyung Lee
, Daeyeon Kim
, Nurrachman Liu
, Michael Wieckowski
, Gregory Chen
, Trevor Mudge
, Dennis Sylvester
, David Blaauw

University of Michigan, Ann Arbor

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

66 Scopus citations

Abstract

Recent high performance IC design has been dominated by power density constraints. 3D integration increases device density even further, and these devices will not be usable without viable strategies to reduce power consumption. This paper proposes the use of near-threshold computing (NTC) to address this issue in a stacked 3D system. In NTC, cores are operated near the threshold voltage (∼200mV above Vth) to optimally balance power and performance [1]. In Centip3De, we operate cores at 650mV, as opposed to the wear-out limited supply voltage of 1.5V. This improves measured energy efficiency by 5.1x. The dramatically lower power consumption of NTC makes it an attractive match for 3D design, which has limited power dissipation capabilities, but also has improved innate power and performance compared to 2D design.

Original language	English
Title of host publication	2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers
Pages	190-191
Number of pages	2
DOIs	https://doi.org/10.1109/ISSCC.2012.6176970
State	Published - 2012
Externally published	Yes
Event	59th International Solid-State Circuits Conference, ISSCC 2012 - San Francisco, CA, United States Duration: 19 Feb 2012 → 23 Feb 2012

Publication series

Name	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Volume	55
ISSN (Print)	0193-6530

Conference

Conference	59th International Solid-State Circuits Conference, ISSCC 2012
Country/Territory	United States
City	San Francisco, CA
Period	19/02/12 → 23/02/12

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Access to Document

10.1109/ISSCC.2012.6176970

Cite this

Fick, D., Dreslinski, R. G., Giridhar, B., Kim, G., Seo, S., Fojtik, M., Satpathy, S., Lee, Y., Kim, D., Liu, N., Wieckowski, M., Chen, G., Mudge, T., Sylvester, D., & Blaauw, D. (2012). Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. In 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers (pp. 190-191). Article 6176970 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 55). https://doi.org/10.1109/ISSCC.2012.6176970

@inproceedings{c133380653c94f0d8e958dd3cfd9f515,

title = "Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores",

abstract = "Recent high performance IC design has been dominated by power density constraints. 3D integration increases device density even further, and these devices will not be usable without viable strategies to reduce power consumption. This paper proposes the use of near-threshold computing (NTC) to address this issue in a stacked 3D system. In NTC, cores are operated near the threshold voltage (∼200mV above Vth) to optimally balance power and performance [1]. In Centip3De, we operate cores at 650mV, as opposed to the wear-out limited supply voltage of 1.5V. This improves measured energy efficiency by 5.1x. The dramatically lower power consumption of NTC makes it an attractive match for 3D design, which has limited power dissipation capabilities, but also has improved innate power and performance compared to 2D design.",

author = "David Fick and Dreslinski, \{Ronald G.\} and Bharan Giridhar and Gyouho Kim and Sangwon Seo and Matthew Fojtik and Sudhir Satpathy and Yoonmyung Lee and Daeyeon Kim and Nurrachman Liu and Michael Wieckowski and Gregory Chen and Trevor Mudge and Dennis Sylvester and David Blaauw",

year = "2012",

doi = "10.1109/ISSCC.2012.6176970",

language = "English",

isbn = "9781467303736",

series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

pages = "190--191",

booktitle = "2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers",

note = "59th International Solid-State Circuits Conference, ISSCC 2012 ; Conference date: 19-02-2012 Through 23-02-2012",

}

Fick, D, Dreslinski, RG, Giridhar, B, Kim, G, Seo, S, Fojtik, M, Satpathy, S, Lee, Y, Kim, D, Liu, N, Wieckowski, M, Chen, G, Mudge, T, Sylvester, D & Blaauw, D 2012, Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. in 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers., 6176970, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, vol. 55, pp. 190-191, 59th International Solid-State Circuits Conference, ISSCC 2012, San Francisco, CA, United States, 19/02/12. https://doi.org/10.1109/ISSCC.2012.6176970

Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. / Fick, David; Dreslinski, Ronald G.; Giridhar, Bharan et al.
2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers. 2012. p. 190-191 6176970 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; Vol. 55).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Fick, David

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AU - Giridhar, Bharan

AU - Kim, Gyouho

AU - Seo, Sangwon

AU - Fojtik, Matthew

AU - Satpathy, Sudhir

AU - Lee, Yoonmyung

AU - Kim, Daeyeon

AU - Liu, Nurrachman

AU - Wieckowski, Michael

AU - Chen, Gregory

AU - Mudge, Trevor

AU - Sylvester, Dennis

AU - Blaauw, David

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AB - Recent high performance IC design has been dominated by power density constraints. 3D integration increases device density even further, and these devices will not be usable without viable strategies to reduce power consumption. This paper proposes the use of near-threshold computing (NTC) to address this issue in a stacked 3D system. In NTC, cores are operated near the threshold voltage (∼200mV above Vth) to optimally balance power and performance [1]. In Centip3De, we operate cores at 650mV, as opposed to the wear-out limited supply voltage of 1.5V. This improves measured energy efficiency by 5.1x. The dramatically lower power consumption of NTC makes it an attractive match for 3D design, which has limited power dissipation capabilities, but also has improved innate power and performance compared to 2D design.

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BT - 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers

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ER -

Fick D, Dreslinski RG, Giridhar B, Kim G, Seo S, Fojtik M et al. Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. In 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers. 2012. p. 190-191. 6176970. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). doi: 10.1109/ISSCC.2012.6176970

Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores

Abstract

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Conference

UN SDGs

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