Calibration of P-bit for aligned stochastic outputs in probabilistic computing

Probabilistic computing has emerged as an innovative alternative to quantum annealing for addressing combinatorial optimization problems at ambient temperature. This study introduces a strategy for implementing and calibrating probabilistic bits using a simple structure centered on an ion-motion-mediated volatile threshold-switching memristor. The threshold switching memristor exhibits stochastic switching properties with bias-dependent controllable probabilities, enabling high-speed outputs proportional to the input signals. The probabilistic bit, as the computational unit of probabilistic computing, is calibrated by adjusting the signal amplitude and pulse width. This process achieves consistent output probabilities across multiple devices despite the device-to-device variation inherently associated with ion-motion-dediated memristors. The calibration approach is validated through simulations of a probabilistic full subtractor operation, highlighting its efficacy in enhancing the operational accuracy and reliability. These findings underscore the potential of calibrated probabilistic bits in enhancing probabilistic computing systems.