Abnormal threshold voltage shifts in P-channel low-temperature polycrystalline silicon thin film under negative bias temperature stress

In this research, we have investigated the instability of P-channel low-temperature polycrystalline silicon (poly-Si) thin-film transistors (LTPS TFTs) with double-layer SiO₂/SiN_X dielectrics. A negative gate bias temperature instability (NBTI) stress was applied and a turn-around behavior phenomenon was observed in the Threshold Voltage Shift (V_th). A positive threshold voltage shift occurs in the first stage, resulting from the negative charge trapping at the SiN_X/SiO₂ dielectric interface being dominant over the positive charge trapping at dielectric/Poly-Si interface. Following a stress time of 7000 s, the V_th switches to the negative voltage direction, which is "turn-around" behavior. In the second stage, the Vth moves from -1.63 V to -2 V, overwhelming the NBTI effect that results in the trapping of positive charges at the dielectric/Poly-Si interface states and generating grain-boundary trap states and oxide traps.