A Wideband Distributed Demodulator at 100 GHz

Zubair Mehmood; Munkyo Seo

doi:10.1109/ISOCC50952.2020.9332955

A Wideband Distributed Demodulator at 100 GHz

Zubair Mehmood
, Munkyo Seo

Sungkyunkwan University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

This paper presents a high speed on-off Keying (OOK) demodulator using distributed approach which is implemented using 28 nm bulk CMOS process. A 100 GHz demodulator post layout full-wave EM simulation results are realized for the data-rate up to 30 Gbps to check the eye diagram at different power levels. The proposed demodulator achieved 50% of eye opening at 30 Gbps for-16 dBm input power. The design consumes 18.5 mW of power and occupies the chip area of 0.135

Original language	English
Title of host publication	Proceedings - International SoC Design Conference, ISOCC 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	83-84
Number of pages	2
ISBN (Electronic)	9781728183312
DOIs	https://doi.org/10.1109/ISOCC50952.2020.9332955
State	Published - 21 Oct 2020
Externally published	Yes
Event	17th International System-on-Chip Design Conference, ISOCC 2020 - Yeosu, Korea, Republic of Duration: 21 Oct 2020 → 24 Oct 2020

Publication series

Name	Proceedings - International SoC Design Conference, ISOCC 2020

Conference

Conference	17th International System-on-Chip Design Conference, ISOCC 2020
Country/Territory	Korea, Republic of
City	Yeosu
Period	21/10/20 → 24/10/20

Keywords

high data rate
modulation
on-off keying

Access to Document

10.1109/ISOCC50952.2020.9332955

Cite this

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title = "A Wideband Distributed Demodulator at 100 GHz",

abstract = "This paper presents a high speed on-off Keying (OOK) demodulator using distributed approach which is implemented using 28 nm bulk CMOS process. A 100 GHz demodulator post layout full-wave EM simulation results are realized for the data-rate up to 30 Gbps to check the eye diagram at different power levels. The proposed demodulator achieved 50\% of eye opening at 30 Gbps for-16 dBm input power. The design consumes 18.5 mW of power and occupies the chip area of 0.135",

keywords = "high data rate, modulation, on-off keying",

author = "Zubair Mehmood and Munkyo Seo",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 17th International System-on-Chip Design Conference, ISOCC 2020 ; Conference date: 21-10-2020 Through 24-10-2020",

year = "2020",

month = oct,

day = "21",

doi = "10.1109/ISOCC50952.2020.9332955",

language = "English",

series = "Proceedings - International SoC Design Conference, ISOCC 2020",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "83--84",

booktitle = "Proceedings - International SoC Design Conference, ISOCC 2020",

}

Mehmood, Z & Seo, M 2020, A Wideband Distributed Demodulator at 100 GHz. in Proceedings - International SoC Design Conference, ISOCC 2020., 9332955, Proceedings - International SoC Design Conference, ISOCC 2020, Institute of Electrical and Electronics Engineers Inc., pp. 83-84, 17th International System-on-Chip Design Conference, ISOCC 2020, Yeosu, Korea, Republic of, 21/10/20. https://doi.org/10.1109/ISOCC50952.2020.9332955

A Wideband Distributed Demodulator at 100 GHz. / Mehmood, Zubair; Seo, Munkyo.
Proceedings - International SoC Design Conference, ISOCC 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 83-84 9332955 (Proceedings - International SoC Design Conference, ISOCC 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A Wideband Distributed Demodulator at 100 GHz

AU - Mehmood, Zubair

AU - Seo, Munkyo

PY - 2020/10/21

Y1 - 2020/10/21

N2 - This paper presents a high speed on-off Keying (OOK) demodulator using distributed approach which is implemented using 28 nm bulk CMOS process. A 100 GHz demodulator post layout full-wave EM simulation results are realized for the data-rate up to 30 Gbps to check the eye diagram at different power levels. The proposed demodulator achieved 50% of eye opening at 30 Gbps for-16 dBm input power. The design consumes 18.5 mW of power and occupies the chip area of 0.135

AB - This paper presents a high speed on-off Keying (OOK) demodulator using distributed approach which is implemented using 28 nm bulk CMOS process. A 100 GHz demodulator post layout full-wave EM simulation results are realized for the data-rate up to 30 Gbps to check the eye diagram at different power levels. The proposed demodulator achieved 50% of eye opening at 30 Gbps for-16 dBm input power. The design consumes 18.5 mW of power and occupies the chip area of 0.135

KW - high data rate

KW - modulation

KW - on-off keying

UR - https://www.scopus.com/pages/publications/85100739204

U2 - 10.1109/ISOCC50952.2020.9332955

DO - 10.1109/ISOCC50952.2020.9332955

M3 - Conference contribution

AN - SCOPUS:85100739204

T3 - Proceedings - International SoC Design Conference, ISOCC 2020

SP - 83

EP - 84

BT - Proceedings - International SoC Design Conference, ISOCC 2020

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 17th International System-on-Chip Design Conference, ISOCC 2020

Y2 - 21 October 2020 through 24 October 2020

ER -

A Wideband Distributed Demodulator at 100 GHz

Abstract

Publication series

Conference

Keywords

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