TY - GEN
T1 - A study on Improvement of Electrical and Retention characteristics of Non-volatile Memory with Al2O3 Insulator
AU - Yoon, Geonju
AU - Kim, Jeongsoo
AU - Shin, Donggi
AU - Mallem, Kumar
AU - Park, Jinsu
AU - Kim, Jaemin
AU - Cho, Jaehyun
AU - Bae, Sangwoo
AU - Kim, Jin Seok
AU - Kim, Hyun Hoo
AU - Yi, Junsin
N1 - Publisher Copyright:
© 2019 FTFMD.
PY - 2019/7
Y1 - 2019/7
N2 - We report the controllable charge (Electron/hole) trapping window layer properties of atomic layer deposited (ALD) aluminum oxide (Al2O3) gate dielectric layer on the Si substrate. Electron/hole blocking mechanism was archived by controlling the Al2O3 composition, band gap and post deposition annealing affect, respectively. The chemical composition of the Al2O3 was confirmed from the X-ray photoelectron spectroscopy analysis. The capacitance-voltage (C-V) characteristic of Al/Al2O3/Si (MOS) metal-oxide-semiconductor structure showed clear accumulation, depletion and inversion regions as-compared with the Al/SiNx/Si MOS devices, respectively, From the C-V curves, the flat band voltage(ΔFB) was shifted accordingly positive and negative with respect to electron/hole trapping effect. In addition, 10 nm AlOx storage layer and SiNx storage layer were compared in the same structure. The 10 nm SiNx storage layer showed a very low retention of 55.1% and the memory window also showed a relatively low value of 2.72V at 18V.
AB - We report the controllable charge (Electron/hole) trapping window layer properties of atomic layer deposited (ALD) aluminum oxide (Al2O3) gate dielectric layer on the Si substrate. Electron/hole blocking mechanism was archived by controlling the Al2O3 composition, band gap and post deposition annealing affect, respectively. The chemical composition of the Al2O3 was confirmed from the X-ray photoelectron spectroscopy analysis. The capacitance-voltage (C-V) characteristic of Al/Al2O3/Si (MOS) metal-oxide-semiconductor structure showed clear accumulation, depletion and inversion regions as-compared with the Al/SiNx/Si MOS devices, respectively, From the C-V curves, the flat band voltage(ΔFB) was shifted accordingly positive and negative with respect to electron/hole trapping effect. In addition, 10 nm AlOx storage layer and SiNx storage layer were compared in the same structure. The 10 nm SiNx storage layer showed a very low retention of 55.1% and the memory window also showed a relatively low value of 2.72V at 18V.
UR - https://www.scopus.com/pages/publications/85073228154
U2 - 10.23919/AM-FPD.2019.8830613
DO - 10.23919/AM-FPD.2019.8830613
M3 - Conference contribution
AN - SCOPUS:85073228154
T3 - AM-FPD 2019 - 26th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, Proceedings
BT - AM-FPD 2019 - 26th International Workshop on Active-Matrix Flatpanel Displays and Devices
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 26th International Workshop on Active-Matrix Flatpanel Displays and Devices: TFT Technologies and FPD Materials, AM-FPD 2019
Y2 - 2 July 2019 through 5 July 2019
ER -