A high voltage half bridge gate driver with mismatch-insensitive dead-time generator

Kunhee Cho, Sungpah Lee, Duckki Kwon

Research output: Contribution to journalArticlepeer-review

9 Scopus citations

Abstract

A high voltage half bridge gate driver with mismatchinsensitive dead-time generator is proposed. The high voltage high-side level shifter with common-mode noise canceller technique guarantees the stable operation in negative output voltage level. Unlike a conventional dead-time generator, the proposed dead-time generator uses one delay cell to generate dead-time and shares it with the high-side and low-side paths. The high-side gate driver allows stable negative operation up to -10.2V DC level and -40.5V peak level at 15V power supply. Measurement results of proposed dead-time generator show 1.7 times and 16.7 times improvement of dead-time mismatch when deadtime is 350 nsec which is minimum set value and 5 μsec, respectively, compared to the conventional dead-time generator.

Original languageEnglish
Pages (from-to)1322-1328
Number of pages7
JournalIEICE Electronics Express
Volume9
Issue number16
DOIs
StatePublished - 2012
Externally publishedYes

Keywords

  • Dead-time
  • Half bridge
  • High voltage gate driver
  • High-side level shifter
  • Mismatch-insensitive

Fingerprint

Dive into the research topics of 'A high voltage half bridge gate driver with mismatch-insensitive dead-time generator'. Together they form a unique fingerprint.

Cite this