A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-κ Dielectrics

Chi On Chui; Hyoungsub Kim; Paul C. McIntyre; Krishna C. Saraswat

A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-κ Dielectrics

Chi On Chui, Hyoungsub Kim, Paul C. McIntyre, Krishna C. Saraswat

Stanford University

Research output: Contribution to journal › Conference article › peer-review

110 Scopus citations

Abstract

A simple and novel self-aligned gate-last MOS process integrating metal gates and high-K dielectrics on Ge has been demonstrated. Improved surface passivation for excellent gate dielectric and field isolation, and n-type dopant incorporation with high surface concentration and shallow junctions have been developed. Conventional VLSI type Ge n-MOSFETs have been fabricated.

Original language	English
Pages (from-to)	437-440
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
State	Published - 2003
Externally published	Yes
Event	IEEE International Electron Devices Meeting - Washington, DC, United States Duration: 8 Dec 2003 → 10 Dec 2003

Cite this

@article{646bbff7d3534972a597947ac3f27960,

title = "A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-κ Dielectrics",

abstract = "A simple and novel self-aligned gate-last MOS process integrating metal gates and high-K dielectrics on Ge has been demonstrated. Improved surface passivation for excellent gate dielectric and field isolation, and n-type dopant incorporation with high surface concentration and shallow junctions have been developed. Conventional VLSI type Ge n-MOSFETs have been fabricated.",

author = "Chui, \{Chi On\} and Hyoungsub Kim and McIntyre, \{Paul C.\} and Saraswat, \{Krishna C.\}",

year = "2003",

language = "English",

pages = "437--440",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Electron Devices Meeting ; Conference date: 08-12-2003 Through 10-12-2003",

}

TY - JOUR

T1 - A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-κ Dielectrics

AU - Chui, Chi On

AU - Kim, Hyoungsub

AU - McIntyre, Paul C.

AU - Saraswat, Krishna C.

PY - 2003

Y1 - 2003

N2 - A simple and novel self-aligned gate-last MOS process integrating metal gates and high-K dielectrics on Ge has been demonstrated. Improved surface passivation for excellent gate dielectric and field isolation, and n-type dopant incorporation with high surface concentration and shallow junctions have been developed. Conventional VLSI type Ge n-MOSFETs have been fabricated.

AB - A simple and novel self-aligned gate-last MOS process integrating metal gates and high-K dielectrics on Ge has been demonstrated. Improved surface passivation for excellent gate dielectric and field isolation, and n-type dopant incorporation with high surface concentration and shallow junctions have been developed. Conventional VLSI type Ge n-MOSFETs have been fabricated.

UR - https://www.scopus.com/pages/publications/0842309773

M3 - Conference article

AN - SCOPUS:0842309773

SN - 0163-1918

SP - 437

EP - 440

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - IEEE International Electron Devices Meeting

Y2 - 8 December 2003 through 10 December 2003

ER -

A Germanium NMOSFET Process Integrating Metal Gate and Improved Hi-κ Dielectrics

Abstract

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