Abstract
A simple and novel self-aligned gate-last MOS process integrating metal gates and high-K dielectrics on Ge has been demonstrated. Improved surface passivation for excellent gate dielectric and field isolation, and n-type dopant incorporation with high surface concentration and shallow junctions have been developed. Conventional VLSI type Ge n-MOSFETs have been fabricated.
| Original language | English |
|---|---|
| Pages (from-to) | 437-440 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting |
| State | Published - 2003 |
| Externally published | Yes |
| Event | IEEE International Electron Devices Meeting - Washington, DC, United States Duration: 8 Dec 2003 → 10 Dec 2003 |
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