TY - JOUR
T1 - A dual-slope capacitance-to-digital converter integrated in an implantable pressure-sensing system
AU - Oh, Sechang
AU - Lee, Yoonmyung
AU - Wang, Jingcheng
AU - Foo, Zhiyoong
AU - Kim, Yejoong
AU - Jung, Wanyeong
AU - Li, Ziyun
AU - Blaauw, David
AU - Sylvester, Dennis
N1 - Publisher Copyright:
© 2015 IEEE.
PY - 2015/7/1
Y1 - 2015/7/1
N2 - A dual-slope capacitance-to-digital converter for pressure-sensing is presented and demonstrated in a complete microsystem. The design uses base capacitance subtraction with a configurable capacitor bank to narrow down input capacitance range and reduce conversion time. An energy-efficient iterative charge subtraction method is proposed, employing a current mirror that leverages the 3.6 V battery supply available in the system. We also propose dual-precision comparators to reduce comparator power while maintaining high accuracy during slope conversion, further improving energy efficiency. The converter occupies 0.105 mm2 in 180 nm CMOS and achieves 44.2 dB SNR at 6.4 ms conversion time and 110 nW of power, corresponding to 5.3 pJ/conv-step FoM. The converter is integrated with a pressure transducer, battery, processor, power management unit, and radio to form a complete 1.4 mm × 2.8 mm × 1.6 mm pressure sensor system aimed at implantable devices. The multi-layer system is implemented in 180 nm CMOS. The system was tested for resolution in a pressure chamber with an external 3.6 V supply and serial communication bus, and the measured resolution of 0.77 mmHg was recorded. We also demonstrated the wireless readout of the pressure data on the stack system operating completely wirelessly using an integrated battery.
AB - A dual-slope capacitance-to-digital converter for pressure-sensing is presented and demonstrated in a complete microsystem. The design uses base capacitance subtraction with a configurable capacitor bank to narrow down input capacitance range and reduce conversion time. An energy-efficient iterative charge subtraction method is proposed, employing a current mirror that leverages the 3.6 V battery supply available in the system. We also propose dual-precision comparators to reduce comparator power while maintaining high accuracy during slope conversion, further improving energy efficiency. The converter occupies 0.105 mm2 in 180 nm CMOS and achieves 44.2 dB SNR at 6.4 ms conversion time and 110 nW of power, corresponding to 5.3 pJ/conv-step FoM. The converter is integrated with a pressure transducer, battery, processor, power management unit, and radio to form a complete 1.4 mm × 2.8 mm × 1.6 mm pressure sensor system aimed at implantable devices. The multi-layer system is implemented in 180 nm CMOS. The system was tested for resolution in a pressure chamber with an external 3.6 V supply and serial communication bus, and the measured resolution of 0.77 mmHg was recorded. We also demonstrated the wireless readout of the pressure data on the stack system operating completely wirelessly using an integrated battery.
KW - Capacitance-to-digital converter
KW - capacitive-sensor interface
KW - integrating converter
KW - pressure-sensing system
KW - wireless sensor node
UR - https://www.scopus.com/pages/publications/85027941707
U2 - 10.1109/JSSC.2015.2435736
DO - 10.1109/JSSC.2015.2435736
M3 - Article
AN - SCOPUS:85027941707
SN - 0018-9200
VL - 50
SP - 1581
EP - 1591
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
IS - 7
M1 - 7122368
ER -