Abstract
This brief presents a wide frequency range digitally controlled oscillator (DCO) with low supply sensitivity and low power consumption. We propose a compensation scheme employing feedforward inverters to suppress supply noise. Both wide frequency range and fine resolution are obtained using a hierarchical architecture consisting of a coarse delay chain and an interpolator. The proposed DCO was fabricated in a 0.13- μm CMOS process. It successfully eliminates noise components due to supply variation. The phase noise at 1-MHz frequency offset from the carrier frequency of 700 MHz is -106.3 dBc/Hz. The frequency range of the DCO is measured from 320 MHz to 1.25 GHz.
| Original language | English |
|---|---|
| Article number | 6015540 |
| Pages (from-to) | 632-636 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 58 |
| Issue number | 10 |
| DOIs | |
| State | Published - Oct 2011 |
Keywords
- All-digital phase-locked loop (ADPLL)
- digitally controlled oscillator (DCO)
- feedforward inverter
- interpolation
- jitter
- wide frequency range
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