Abstract
In this brief, decision-feedback equalization (DFE) receiver for multidrop single-ended signaling is described. The proposed DFE receiver adopts a reference voltage having equalization information to remove channel intersymbol interference. It uses a smaller number of DFE tap elements than the conventional DFE receiver for the same level of equalization, resulting in reduced power consumption and silicon area, particularly for multi-input/output interface. The proposed DFE receiver was fabricated in a 0.13-μm CMOS process, whose evaluation results indicate a reliable operation up to 3.40-Gb/s data rate with reduced power consumption.
| Original language | English |
|---|---|
| Article number | 6508848 |
| Pages (from-to) | 412-416 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 60 |
| Issue number | 7 |
| DOIs | |
| State | Published - 2013 |
Keywords
- Decision-feedback equalization (DFE) receiver
- dynamic random access memory (DRAM) interface
- multidrop channel
- single-ended signaling
Fingerprint
Dive into the research topics of 'A DFE receiver with equalized VREF for multidrop single-ended signaling'. Together they form a unique fingerprint.Cite this
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver