A Design of 14-bits ADC and DAC for CODEC applications in 0.18μm CMOS process

  • Dong Hyun Ko
  • , Ji Hoon Jung
  • , Young Gun Pu
  • , Sang Kyung Sung
  • , Kang Yoon Lee
  • , Chul Nam

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

This paper presents a sigma-delta modulation ADC(Analog-to-Digital Converter) and DAC(Digital-to-Analog Converter) for CODEC applications using 0.18μm CMOS process. In the ADC parts, two sigma-delta modulators with 84dB SNR are designed for the stereo applications, and their outputs are merged at the digital domain before decimation filter. Digital decimation filter is integrated with the analog sigma-delta modulators for the full ADC operation. In the DAC parts, the digital data is first processed at the interpolator filters, and modulated by the following sigma-delta modulators. To reduce the mismatch effect of the following DAC, the dynamic element matching method is proposed in this paper. It is designed with 0.18μm CMOS process. The simulated SNR is about 100dB, and the power consumption is 40mA

Original languageEnglish
Title of host publicationProceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008
Pages3-6
Number of pages4
DOIs
StatePublished - 2008
Event4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008 - Hong Kong, SAR, Hong Kong
Duration: 23 Jan 200825 Jan 2008

Publication series

NameProceedings - 4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008

Conference

Conference4th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2008
Country/TerritoryHong Kong
CityHong Kong, SAR
Period23/01/0825/01/08

Keywords

  • ADC(Analog-to-Digital Converter)
  • DAC (Digital-to-Analog Converter)
  • Sigma-Delta Modulator

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