Abstract
This brief introduces an area-efficient SRAM-based Physically Unclonable Function (PUF) designed using a conventional 6T-SRAM architecture, thereby also facilitating its use as SRAM. By exploiting read current mismatch induced by the variation in the access transistor's threshold voltage, a key is generated by comparing the voltages of bitlines discharged from two adjacent SRAMs. Using the maximum mismatch detection stabilization technique, the PUF's stability is enhanced by identifying the access transistors exhibiting the highest read current mismatch in two adjacent SRAM cells. The proposed PUF is fabricated in 28-nm FDSOI process and has a bitcell area of 328F2. Although under nominal conditions, the native bit error rate (BER) and unstable bits ratio (UBR) are 1.92% and 16.44%, respectively, the proposed stabilization technique and the application of 7-bit temporal majority voting improved the BER and UBR to 0.056% and 0.37%, respectively.
| Original language | English |
|---|---|
| Pages (from-to) | 3493-3497 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 71 |
| Issue number | 7 |
| DOIs | |
| State | Published - 2024 |
| Externally published | Yes |
Keywords
- Internet of Things (IoT)
- maximum mismatch detection (MMD)
- physically unclonable function (PUF)
- security
- SRAM
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