TY - GEN
T1 - A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor
AU - Kim, Hyejung
AU - Kim, Yongsang
AU - Yoo, Hoi Jun
PY - 2008
Y1 - 2008
N2 - A low energy modulo-multiplier is proposed for elliptic curve cryptography (ECC) processor, especially for authentication in mobile device or key encryption in embedded health-care system. The multiplier uses only two 40-bit multipliers to execute 160-bit operation based on the Montgomery modulo-multiplication algorithm. Partial products of multiplication are accumulated with shift registers to get final 160-bit MSB of output value. One modulo-multiplication is executed with 20 clock cycles at 40MHz operating frequency. It consumes 6.3nJ for each modulo-multiplication at 1V supply voltage. It is implemented by using 0.18-μm CMOS process and has 0.7mm x 1.0mm area.
AB - A low energy modulo-multiplier is proposed for elliptic curve cryptography (ECC) processor, especially for authentication in mobile device or key encryption in embedded health-care system. The multiplier uses only two 40-bit multipliers to execute 160-bit operation based on the Montgomery modulo-multiplication algorithm. Partial products of multiplication are accumulated with shift registers to get final 160-bit MSB of output value. One modulo-multiplication is executed with 20 clock cycles at 40MHz operating frequency. It consumes 6.3nJ for each modulo-multiplication at 1V supply voltage. It is implemented by using 0.18-μm CMOS process and has 0.7mm x 1.0mm area.
UR - https://www.scopus.com/pages/publications/51749119646
U2 - 10.1109/ISCAS.2008.4542166
DO - 10.1109/ISCAS.2008.4542166
M3 - Conference contribution
AN - SCOPUS:51749119646
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 3310
EP - 3313
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -