Abstract
A novel linear switched termination active cross-coupled low-voltage differential signaling (LVDS) transceiver operating at 1.5 GHz clock frequency is presented On the transmitter side, an active cross-coupled linear output driver and a switched termination scheme are applied to achieve high speed with low current. On the receiver side, a shared preamplifier scheme is employed to reduce power consumption. The proposed LVDS transceiver implemented in an 80 nm CMOS process is successfully demonstrated to provide a data rate of 6 Gbps/pin, an output data window of 147ps peak-to-peak, and a data swing of 196 mV. The power consumption is measured to be 4.2 mW/pin at 1.2 V.
| Original language | English |
|---|---|
| Pages (from-to) | 612-614 |
| Number of pages | 3 |
| Journal | ETRI Journal |
| Volume | 30 |
| Issue number | 4 |
| DOIs | |
| State | Published - Aug 2008 |
Keywords
- DRAM
- Half-duplex
- I/O
- LVDS
- Transceiver