A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections

Jae Woo Park; Nicolas Pantano; Geert Van Der Plas; Eric Beyne; Jung Hoon Chun

doi:10.1109/ECTC51529.2024.00172

A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections

Jae Woo Park
, Nicolas Pantano
, Geert Van Der Plas
, Eric Beyne
, Jung Hoon Chun

Department of Semiconductor Systems Engineering

Sungkyunkwan University
Interuniversitair Micro-Elektronica Centrum

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

Leveraging advanced packaging technology can further improve chip integration by minimizing the dimensions of chip-to-chip interconnections at chiplet interfaces. Nonetheless, the escalation of crosstalk noise, driven by increased speed and routing density, poses a threat to chip functionality. This paper explores the effects of crosstalk in systems through channels with varied lengths and spacings. It also introduces a new high-speed bi-directional transceiver architecture designed to mitigate crosstalk in chiplets or systems featuring short channels and multiple inputs/outputs. Implemented using a 12-nm FinFET process, the proposed transceiver achieves an energy efficiency of 0.46 pJ/bit while operating at 32 Gb/s across a 5-mm channel with 1-μm spacing.

Original language	English
Title of host publication	Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1072-1077
Number of pages	6
ISBN (Electronic)	9798350375985
DOIs	https://doi.org/10.1109/ECTC51529.2024.00172
State	Published - 2024
Event	74th IEEE Electronic Components and Technology Conference, ECTC 2024 - Denver, United States Duration: 28 May 2024 → 31 May 2024

Publication series

Name	Proceedings - Electronic Components and Technology Conference
ISSN (Print)	0569-5503

Conference

Conference	74th IEEE Electronic Components and Technology Conference, ECTC 2024
Country/Territory	United States
City	Denver
Period	28/05/24 → 31/05/24

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

Bi-directional
Chip-to-chip
crosstalk cancellation
transceiver

Access to Document

10.1109/ECTC51529.2024.00172

Cite this

Park, J. W., Pantano, N., Van Der Plas, G., Beyne, E., & Chun, J. H. (2024). A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections. In Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024 (pp. 1072-1077). (Proceedings - Electronic Components and Technology Conference). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC51529.2024.00172

Park, Jae Woo ; Pantano, Nicolas ; Van Der Plas, Geert et al. / A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections. Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024. Institute of Electrical and Electronics Engineers Inc., 2024. pp. 1072-1077 (Proceedings - Electronic Components and Technology Conference).

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title = "A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections",

abstract = "Leveraging advanced packaging technology can further improve chip integration by minimizing the dimensions of chip-to-chip interconnections at chiplet interfaces. Nonetheless, the escalation of crosstalk noise, driven by increased speed and routing density, poses a threat to chip functionality. This paper explores the effects of crosstalk in systems through channels with varied lengths and spacings. It also introduces a new high-speed bi-directional transceiver architecture designed to mitigate crosstalk in chiplets or systems featuring short channels and multiple inputs/outputs. Implemented using a 12-nm FinFET process, the proposed transceiver achieves an energy efficiency of 0.46 pJ/bit while operating at 32 Gb/s across a 5-mm channel with 1-μm spacing.",

keywords = "Bi-directional, Chip-to-chip, crosstalk cancellation, transceiver",

author = "Park, \{Jae Woo\} and Nicolas Pantano and \{Van Der Plas\}, Geert and Eric Beyne and Chun, \{Jung Hoon\}",

note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 74th IEEE Electronic Components and Technology Conference, ECTC 2024 ; Conference date: 28-05-2024 Through 31-05-2024",

year = "2024",

doi = "10.1109/ECTC51529.2024.00172",

language = "English",

series = "Proceedings - Electronic Components and Technology Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1072--1077",

booktitle = "Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024",

}

Park, JW, Pantano, N, Van Der Plas, G, Beyne, E & Chun, JH 2024, A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections. in Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024. Proceedings - Electronic Components and Technology Conference, Institute of Electrical and Electronics Engineers Inc., pp. 1072-1077, 74th IEEE Electronic Components and Technology Conference, ECTC 2024, Denver, United States, 28/05/24. https://doi.org/10.1109/ECTC51529.2024.00172

A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections. / Park, Jae Woo; Pantano, Nicolas; Van Der Plas, Geert et al.
Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024. Institute of Electrical and Electronics Engineers Inc., 2024. p. 1072-1077 (Proceedings - Electronic Components and Technology Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Park, Jae Woo

AU - Pantano, Nicolas

AU - Van Der Plas, Geert

AU - Beyne, Eric

AU - Chun, Jung Hoon

PY - 2024

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N2 - Leveraging advanced packaging technology can further improve chip integration by minimizing the dimensions of chip-to-chip interconnections at chiplet interfaces. Nonetheless, the escalation of crosstalk noise, driven by increased speed and routing density, poses a threat to chip functionality. This paper explores the effects of crosstalk in systems through channels with varied lengths and spacings. It also introduces a new high-speed bi-directional transceiver architecture designed to mitigate crosstalk in chiplets or systems featuring short channels and multiple inputs/outputs. Implemented using a 12-nm FinFET process, the proposed transceiver achieves an energy efficiency of 0.46 pJ/bit while operating at 32 Gb/s across a 5-mm channel with 1-μm spacing.

AB - Leveraging advanced packaging technology can further improve chip integration by minimizing the dimensions of chip-to-chip interconnections at chiplet interfaces. Nonetheless, the escalation of crosstalk noise, driven by increased speed and routing density, poses a threat to chip functionality. This paper explores the effects of crosstalk in systems through channels with varied lengths and spacings. It also introduces a new high-speed bi-directional transceiver architecture designed to mitigate crosstalk in chiplets or systems featuring short channels and multiple inputs/outputs. Implemented using a 12-nm FinFET process, the proposed transceiver achieves an energy efficiency of 0.46 pJ/bit while operating at 32 Gb/s across a 5-mm channel with 1-μm spacing.

KW - Bi-directional

KW - Chip-to-chip

KW - crosstalk cancellation

KW - transceiver

UR - https://www.scopus.com/pages/publications/85197669234

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BT - Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024

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ER -

Park JW, Pantano N, Van Der Plas G, Beyne E, Chun JH. A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections. In Proceedings - IEEE 74th Electronic Components and Technology Conference, ECTC 2024. Institute of Electrical and Electronics Engineers Inc. 2024. p. 1072-1077. (Proceedings - Electronic Components and Technology Conference). doi: 10.1109/ECTC51529.2024.00172

A 32 Gb/s Full duplex Bi-directional Transceiver with Crosstalk Cancellation for Chiplet Interconnections

Abstract

Publication series

Conference

UN SDGs

Keywords

Access to Document

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