A 23.9-μW 13.6-Bit Period Modulation-Based Capacitance-to-Digital Converter with Dynamic Current Mirror Front-End

This letter proposes a low-power high-precision capacitance-to-digital converter (CDC) utilizing a dynamic current mirror (DCM) to transform a sensor input capacitance (C_ IN) into an output current. The resulting current is directly proportional to the ratio of C_ IN to an internal reference capacitor (C_ REF) and subsequently converted into a period-modulated output, facilitating simple digitization by a digital counter. The CDC achieves an extensive C_ IN range of 1 to 68 pF without the need for a power-hungry reference buffer. Fabricated in a 65-nm CMOS process, the prototype IC occupies a small area of 0.05-mm2 and consumes only 23.9~μ W even with a C_ IN of 47 pF. It achieves a capacitance resolution of 1.65 fF for a C_ IN of 1 pF with a conversion time of 4 ms, corresponding to a 13.6-bit effective number of bit.