A 150 GHz amplifier with 8 dB gain and +6 dBm Psat in digital 65 nm CMOS using dummy-prefilled microstrip lines

Munkyo Seo, Basanth Jagannathan, John Pekarik, Mark J.W. Rodwell

Research output: Contribution to journalArticlepeer-review

70 Scopus citations

Abstract

A 150 GHz amplifier in digital 65 nm CMOS process is presented. Matching loss is reduced and bandwidth extended by simplistic topology: no dc-block capacitor, shunt-only tuning and radial stubs for ac ground. Dummy-prefilled microstrip lines, with explicit yet efficient dummy modeling, are used as a compact, density-rule compliant matching element. Transistor layout with parallel gate feed yields 5.7 dB of MSG at 150 GHz. Measurement shows the amplifier exhibits 8.2 dB of gain, 6.3 dBm of Past 1.5 dBm of P 1dB and 27 GHz of 3 dB bandwidth, while consuming 25.5 mW at 1.1 V. The dummy-prefilled microstrip line exhibits QTL ≅ up to 200 GHz.

Original languageEnglish
Article number5342355
Pages (from-to)3410-3421
Number of pages12
JournalIEEE Journal of Solid-State Circuits
Volume44
Issue number12
DOIs
StatePublished - Dec 2009
Externally publishedYes

Keywords

  • 150 GHz amplifier
  • 65 nm
  • Amplifiers
  • CMOS millimeter-wave integrated circuits
  • Dummy modeling
  • Matching loss
  • Metal filling
  • Millimeter-wave integrated circuits
  • MMICs
  • Pattern density rules
  • Silicon
  • Transmission lines

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