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45pW ESD clamp circuit for ultra-low power applications

  • Yen Po Chen
  • , Yoonmyung Lee
  • , Jae Yoon Sim
  • , Massimo Alioto
  • , David Blaauw
  • , Dennis Sylvester
  • University of Michigan, Ann Arbor
  • Pohang University of Science and Technology
  • University of Siena

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Novel ultra low-leakage ESD power clamp designs for wireless sensor applications are proposed and implemented in 0.18μm CMOS. Using new biasing structures to limit both subthreshold leakage and GIDL, the proposed designs consume as little as 43pW at 25̊C and 119nW at 125̊C with 4500V HBM level and 400V MM level protection, marking an 18-139× leakage reduction over conventional ESD clamps.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2013 Custom Integrated Circuits Conference, CICC 2013
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781467361460
DOIs
StatePublished - 7 Nov 2013
Externally publishedYes
Event35th Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2013 - San Jose, CA, United States
Duration: 22 Sep 2013 → 25 Sep 2013

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Conference

Conference35th Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2013
Country/TerritoryUnited States
CitySan Jose, CA
Period22/09/13 → 25/09/13

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