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Dive into the research topics where Kee-Won Kwon is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
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Collaborations and top research areas from the last five years
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A Balanced Shorted-Latch Sense Amplifier with PMOS Equalizer for Latency-Yield-Area Co-Optimization
Kim, C. & Kwon, K. W., 2026, 2026 International Conference on Electronics, Information, and Communication, ICEIC 2026. Institute of Electrical and Electronics Engineers Inc., (2026 International Conference on Electronics, Information, and Communication, ICEIC 2026).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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MIRA: A 5T1C Flash Cell-based Mixed-Signal InMemory Readout Architecture Achieving Highly Accurate VMM Computation
Kim, H. M., Park, C. W. & Kwon, K. W., 2026, 2026 International Conference on Electronics, Information, and Communication, ICEIC 2026. Institute of Electrical and Electronics Engineers Inc., (2026 International Conference on Electronics, Information, and Communication, ICEIC 2026).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review
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A Comparative Analysis of Middle-of-Line Contact Architectures for Complementary FETs
Kyu Kim, S., Kim, J., Choi, G., Kwon, K. W. & Jeon, J., 2025, In: IEEE Access. 13, p. 5396-5405 10 p.Research output: Contribution to journal › Article › peer-review
Open Access14 Link opens in a new tab Scopus citations -
Investigation of Nanoscale Bonding-Based Complementary FETs
Kim, S. K., Kim, J., Kwon, K. W. & Jeon, J., 2025, In: IEEE Transactions on Electron Devices. 72, 9, p. 4614-4620 7 p.Research output: Contribution to journal › Article › peer-review
2 Link opens in a new tab Scopus citations -
LibraPIM: Dynamic Load Rebalancing to Maximize Utilization in PIM-Assisted LLM Inference Systems
Cho, H., Jang, Y., Kim, H., Kim, S., Kwon, K., Kim, G. & Hong, S., 2025, Proceedings - 2025 34th International Conference on Parallel Architectures and Compilation Techniques, PACT 2025. Institute of Electrical and Electronics Engineers Inc., p. 43-56 14 p. (Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review