Jong Wuk Jun

Emailvoix0707skkuedu
Websitehttps://sites.google.com/view/skku-drl/home

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Research activity per year

Education

(B.S) Electrical Engineering, Sungkyunkwan University, Suwon, Korea, 2004.02
(Ph.D) Electrical Engineering, Seoul National University, Seoul, Korea, 2009.08

Professional Experience

Senior Engineer, Semiconductor R&D Center, Samsung Electronics, 2009.09-2016.02.
Principal Engineer, Semiconductor R&D Center, Samsung Electronics, 2016.03-2017.08.
Assistant Professor, Konkuk University, 2017.09-2021.08
Associate Professor, Konkuk University, 2021.09-2023.08
Associate Professor, SungkyunKwan University, 2023.09-

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97 Article
27 Conference contribution
4 Comment/debate
2 Review article

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash
Kim, C., Hong, J., Kim, M., Kim, H. & Jeon, J., 2026, In: IEEE Access. 14, p. 14098-14107 10 p.
Research output: Contribution to journal › Article › peer-review

Open Access
From vulnerability to robustness: Radiation-hard isolation for BPR-enabled stacked nanosheet CFETs
Kim, D., Jung, H., Lee, J., Kim, S. & Jeon, J., May 2026, In: Nuclear Engineering and Technology. 58, 5, 104104.
Research output: Contribution to journal › Article › peer-review

Open Access
Lateral Leakage Suppression Using H₂ Plasma-Treated SiN_x for High-Resolution Organic Displays
Oh, J., Kim, M., Park, C., Joo, B., Park, S., Jeon, J. & Kim, H., 2026, (Accepted/In press) In: IEEE Electron Device Letters.
Research output: Contribution to journal › Article › peer-review
Machine Learning-Based Standard Compact Model Binning Parameter Extraction Methodology for Integrated Circuit Design of Next-Generation Semiconductor Devices
Kang, J., Kim, J., Kim, S., Cho, H. & Jeon, J., Feb 2026, In: Advanced Intelligent Systems. 8, 2, e202500511.
Research output: Contribution to journal › Article › peer-review

Open Access
Via-Optimized CFET 6T SRAM: Performance, Stability, Manufacturability, and Scalability
Lee, J., Ahn, S., Lee, J. & Jeon, J., 2026, In: IEEE Transactions on Electron Devices. 73, 1, p. 90-96 7 p.
Research output: Contribution to journal › Article › peer-review

Jong Wuk Jun

Personal profile

Education

Professional Experience

Fingerprint

Collaborations and top research areas from the last five years

Dive into details

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash

From vulnerability to robustness: Radiation-hard isolation for BPR-enabled stacked nanosheet CFETs

Lateral Leakage Suppression Using H₂ Plasma-Treated SiN_x for High-Resolution Organic Displays

Machine Learning-Based Standard Compact Model Binning Parameter Extraction Methodology for Integrated Circuit Design of Next-Generation Semiconductor Devices

Via-Optimized CFET 6T SRAM: Performance, Stability, Manufacturability, and Scalability

Jong Wuk Jun

Personal profile

Education

Professional Experience

Fingerprint

Collaborations and top research areas from the last five years

Research output

Dual-Doped Cylindrical Bit-Line Pad for High-Efficiency Bulk Erase in V-NAND Flash

From vulnerability to robustness: Radiation-hard isolation for BPR-enabled stacked nanosheet CFETs

Lateral Leakage Suppression Using H2 Plasma-Treated SiNx for High-Resolution Organic Displays

Machine Learning-Based Standard Compact Model Binning Parameter Extraction Methodology for Integrated Circuit Design of Next-Generation Semiconductor Devices

Via-Optimized CFET 6T SRAM: Performance, Stability, Manufacturability, and Scalability

Lateral Leakage Suppression Using H₂ Plasma-Treated SiN_x for High-Resolution Organic Displays